creat by art - glass passivated junction chip - ideal for automated placement - low profile package - low power loss, high efficiency - moisture sensitivity level: level 1, per j-std-020 - halogen-free according to iec 61249-2-21 definition molding compound, ul flammability classification rating 94v-0 base p/n with suffix "g" on packing code - green compound (halogen-free) base p/n with prefix "h" on packing code - aec-q101 qualified terminal: matte tin plated leads, solderable per jesd22-b102 meet jesd 201 class 1a whisker test with prefix "h" on packing code meet jesd 201 class 2 whisker test eal ebl ecl edl efl egl ehl ejl v rrm 50 100 150 200 300 400 500 600 v v rms 35 70 105 140 210 280 350 420 v v dc 50 100 150 200 300 400 500 600 v i f(av) a cj pf trr ns t j o c t stg o c document number: ds_d1405035 version: i14 note 3: reverse recovery test conditions: i f =0.5a, i r =1.0a, i rr =0.25a taiwan semiconductor es 1hl 0.95 1.3 1.7 10 8 35 operating junction temperature range - 55 to +150 storage temperature range - 55 to +150 note 1: pulse test with pw=300 s, 1% duty cycle note 2: measured at 1 mhz and applied vr=4.0 volts. a maximum instantaneous forward voltage (note 1) @ 1 a v f v maximum reverse current @ rated vr t j =25 t j =125 o c/w 1 peak forward surge current, 8.3 ms single half sine-wave superimposed on rated load i fsm typical junction capacitance (note 2) maximum reverse recovery time (note 3) typical thermal resistance r jl r ja 35 85 parameter symbol es 1al i r 5 a 100 maximum rms voltage maximum dc blocking voltage maximum average forward rectified current polarity: indicated by cathode band weight: 0.019 g (approximately) maximum ratings and electrical characteristics (t a =25 unless otherwise noted) 30 es 1fl es 1gl es 1jl unit marking code maximum repetitive peak reverse voltage ES1AL thru es1jl surface mount su p er fast rectifiers features - compliant to rohs directive 2011/65/eu and in accordance to weee 2002/96/ec es 1bl es 1cl es 1dl mechanical data case: sub sma sub sma
part no. part no. es1jl es1jl es1jl (ta=25 unless otherwise noted) document number: ds_d1405035 version: i14 es1jlhru h ru aec-q101 qualified ratings and characteristics curves es1jl ru ru es1jl rug ru g green compound mh sub sma 10,000 / 13" plastic reel (12mm tape) note 1: "x" defines voltage from 50v (ES1AL) to 600v (es1jl) example preferred p/n aec-q101 qualified packing code green compound code description m2 sub sma 7,500 / 13" plastic reel (12mm tape) rh sub sma 10,000 / 13" paper reel (12mm tape) rf sub sma 3,000 / 7" plastic reel (12mm tape) r2 sub sma 7,500 / 13" paper reel (12mm tape) mq sub sma 10,000 / 13" plastic reel (8mm tape) r3 sub sma 1,800 / 7" plastic reel (12mm tape) sub sma 7,500 / 13" paper reel (8mm tape) mt sub sma 7,500 / 13" plastic reel (8mm tape) rq sub sma 10,000 / 13" paper reel (8mm tape) es1xl (note 1) prefix "h" ru suffix "g" sub sma 1,800 / 7" plastic reel (8mm tape) rv sub sma 3,000 / 7" plastic reel (8mm tape) rt ES1AL thru es1jl taiwan semiconductor ordering information aec-q101 qualified packing code green compound code package packing 0 0.2 0.4 0.6 0.8 1 1.2 80 90 100 110 120 130 140 150 average forward current (a) lead temperature ( o c) fig.1 forward current derating curve resistive or inductive load 0 5 10 15 20 25 30 1 10 100 peak forward surge current (a) number of cycles at 60 hz fig. 3 maximum non-repetitive forward surge current 8.3ms single half sine wave 0.01 0.1 1 10 100 1000 0 20 40 60 80 100 120 140 instantaneous reverse current ( a) percent of rated peak reverse voltage (%) fig. 4 typical reverse characteristics tj=25 tj=125 tj=75 0.1 1 10 100 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 instantaneous forward current (a) forward voltage (v) fig. 2 typical forward characteristics es1hl-es1jl pulse width=300 s 1% duty cycle es1fl-es1gl ES1AL-es1dl
min max min max b 1.70 1.90 0.067 0.075 c 2.70 2.90 0.106 0.114 d 0.16 0.30 0.006 0.012 e 1.23 1.43 0.048 0.056 f 0.80 1.20 0.031 0.047 g 3.40 3.80 0.134 0.150 h 2.45 2.60 0.096 0.102 i 0.35 0.85 0.014 0.033 j 0.00 0.10 0.000 0.004 p/n = marking code g = green compound yw = date code f = factory code document number: ds_d1405035 version: i14 marking diagram d 1.9 0.075 e 4.3 0.169 b 1.2 0.047 c 3.1 0.122 suggested pad layout symbol unit (mm) unit (inch) a 1.4 0.055 ES1AL thru es1jl taiwan semiconductor package outline dimensions dim. unit (mm) unit (inch) 0 2 4 6 8 10 12 14 1 10 100 capacitance (pf) reverse voltage (v) fig. 5 typical junction capacitance ES1AL-es1dl es1fl-es1jl f=1.0mhz vsig=50mvp-p
creat by art assumes no responsibility or liability for any errors inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied,to any intellectual property rights is granted by this document. except as provided in tsc's terms and conditions of sale for such products, tsc assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of tsc products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or seling these products for use in such applications do so at their own risk and agree to fully indemnify tsc for any damages resulting from such improper use or sale. document number: ds_d1405035 version: i14 ES1AL thru es1jl taiwan semiconductor notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf,
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